1. Field of the Invention
The present invention relates to an automatic adaptive equalizer for use in a quadrature amplitude modulation (referred to as QAM hereinafter) signal demodulator or detection equipment. It is noted that "in quadrature" applies to two sinusoidal quantities of the same frequency having a phase difference of .+-.(.pi./2)rad and that the term QAM is used herein broadly to include all systems in which the transmitted signal can be represented as the superposition of two modulated signals, each being obtained by pulse amplitude modulation of a signal sequence on a sinusoidal carrier, the two signal sequences being generated in synchronism at the same rate, and the two carriers being of the same frequency but 90.degree. apart in phase. QAM thus includes a wide variety of double sideband systems, including pure phase modulation and combined amplitude and phase modulation. Phase modulated signals are considered within the scope of quadrature amplitude modulated signals. Therefore, the automatic equalizer and QAM demodulator of the present invention are also applicable for demodulation of phase modulated signals.
2. Description of the Prior Art
It is a common practice to provide a fixed or automatic equalizer with a reverse characteristic of a communication line or lines in a QAM receiver for use in a radio or wire communication line for removing distortion or non-sinusoidal signals caused due to a characteristic inherent to the communication line or lines. An automatic equalizer composed of a transversal filter with variable gain tap coefficients has a capability of following the change of the characteristics with time lapse on the communication line, and therefore the automatic equalizer has an equalizing ability superior to that of a fixed type equalizer.
FIG. 1 shows an example of a conventional QAM demodulator including an automatic equalizer, wherein the QAM demodulator utilizes digital signal processing techniques such as a digital signal processor (referred to as DSP hereinafter).
In the QAM demodulator shown in FIG. 1, a received signal which is A/D (analog-to-digital) converted through an A/D converter (not shown) is inputted to an input terminal 71 of the QAM demodulator and the input digital signal is multiplied in a complex multiplier 72 by a complex reference carrier signal generated from a reference carrier generator 74.
It is noted that the complex reference carrier referred in this specification consists of a real part and an imaginary part in which both of the parts are in quadrature to each other, in other words, the phase of the imaginary carrier is different from that of the real carrier by .pi./2. The complex reference carrier wave is represented as follows: EQU exp(-j .omega..sub.c k)=cos .omega..sub.c k-j.multidot.sin .omega..sub.c k, or EQU exp(j .omega..sub.c k)=cos .omega..sub.c k+j.multidot.sin .omega..sub.c k
In this specification, two types of complex multipliers are utilized. In the first type of complex multiplier, a real quantity is multiplied by a complex quantity as in the complex multiplier 72 shown in FIG. 1. In the second type of the complex multiplier, a complex number is multiplied by a complex number.
The output signal of the complex multiplier 72 is entered to a low-pass filter 75 so that the components of the frequency of the entered signal which are twice the carrier are removed and wave shaping of the entered signal is performed. The output signal of the low-pass filter 75 is applied to an automatic equalizer filter 76 of a baseband type. The baseband type has a frequency response characteristic of the frequency band occupied by all the signals used to modulate a transmitted carrier. The automatic baseband equalizer filter 76 is composed of a transversal filter of a low-pass filter type. The output signal of the baseband equalizer filter 76 is applied to an error detector 77, and the output data of the error detector 77 is applied to a gain tap coefficient adjusting unit 78 which adjusts the complex gain tap coefficients for the transversal filter constructing the baseband equalizer filter 76 on the basis of the output signal of the error detector 77. Each complex number of the gain tap coefficients consists of a pair of real and imaginary parts thereof, which are stored in the equalizer and determine its characteristics.
FIG. 2 is a block diagram showing a constitution of the low-pass filter 75 and baseband equalizer filter 76. The real and imaginary parts of the complex data outputted from the complex multiplier 72 (see FIG. 1) are respectively applied to the input terminals 751 and 752 of the low-pass filter 75. The filtering operations for the real and imaginary parts of the complex data applied to the input terminals 751 and 752 are carried out through filter operating units 753 and 754 respectively. As shown in FIG. 2, the automatic baseband equalizer filter 76 includes four filter operating units 761 to 764. The real and imaginary parts of the output data of the baseband equalizer filter 76 are respectively outputted from the output terminals 765 and 766 so as to be applied to the error detector 77 (see FIG. 1).
FIG. 3 shows the automatic baseband equalizer filter 76, error detector 77 and gain tap coefficient adjusting unit 78 further in detail. In FIG. 3, all of the data transmitted between the circuit components are complex data each having a pair of real and imaginary parts.
The automatic baseband equalizer filter 76 is a transversal filter, which comprises three complex gain tap coefficient memory units 767, three multipliers 768, two complex delay registers 769 and an adder 770. In each of the multipliers 768, a multiplication represented by an expression (1) is performed as follows, provided that the input complex data applied to the input terminal 760 is represented by "x.sup.R +jx.sup.I " and that the complex gain tap coefficient is represented by "C.sup.R +jC.sup.I ", EQU (x.sup.R +jx.sup.I) (C.sup.R +jC.sup.I)=x.sup.R C.sup.R -x.sup.I C.sup.I +j(x.sup.R C.sup.I +x.sup.I C.sup.R) (1)
Accordingly, it is required to perform actually four multiplication operations and two addition/subtraction operations in each of the complex multipliers 768. The error detector 77 comprises a data discriminator 772 and subtracter 771. The gain tap coefficient adjusting unit 78 comprises three conjugate complex data output function generators 781, a complex multiplier 782, three complex multipliers 783 and three adders 784.
The complex gain tap coefficients for the baseband equalizer filter 76 are adjusted in the gain tap coefficient adjusting unit 78 utilizing a maximum descent repetition method as follows: EQU C.sub.m,n =C.sub.m,n-1 -K.multidot..DELTA.E (2)
wherein .DELTA.E represents a quantity to be adjusted in the order of the n-th time, and C.sub.m,n represents the complex gain tap coefficient in the m-th order for the baseband equalizer filter 76 being subjected to the n-th time adjustment. K represents an appropriate factor (real number) for ensuring the focusing of the expression (2), which is entered in the complex multiplier 782. In the case of the QAM demodulator shown in FIG. 1, .DELTA.E is represented by an equation (3) as follows: EQU .DELTA.E=E.sub.k .multidot.conj(X.sub.k-p) (3)
wherein E.sub.k represents an error data outputted from the error detector 77 at the time of k, and X.sub.k-p represents the complex input data applied to the baseband equalizer filter 76 at the time k-p. conj( ) represents a function varying with conjugate complex numbers, the operation of which is performed in the conjugate complex data output function generators 781.
As shown in FIG. 2, in the conventional QAM demodulator, it is required to provide six filter operating units 753, 754, and 761 to 764. The filtering operations performed in the filter operating units includes a number of operations for multiplication and addition. In recent years, such a QAM demodulator is generally realized using DSP chip with application of digital signal processing techniques. However, this large number of multiplication and addition operations results in a great load on the DSP, and therefore, it is required to provide a high speed DSP chip with large capacity. Such a DSP chip is usually expensive and the spaces for semiconductor chips provided therein become large.